The invention relates to analog-to-digital converters, and, more particularly, to differential input xe2x80x9cflashxe2x80x9d converters wherein a plurality of comparisons between an input signal, or a signal related to the input signal, and a corresponding plurality of reference signals are made in order to provide a plurality of bits of the digital output xe2x80x9cwordxe2x80x9d simultaneously.
Analog-to-digital converters are well known in the art. One type of analog-to-digital converter uses a single comparator to successively compare an input signal to a plurality of reference signals. This type of comparator, while inexpensive, is inherently slow since the single comparator must make a number of successive comparisons in order to convert each analog sample into a digital output word.
Another type of analog-to-digital converter is known as the xe2x80x9cflashxe2x80x9d converter. The flash converter uses a plurality of comparators to simultaneously compare samples of an input signal. A characteristic flash converter is configured such that each first comparator input is connected to an impedance network for supplying each of the comparators with its own predetermined reference signal. Furthermore, each second comparator input is connected to receive an analog input signal, or another signal related to that input signal. Finally, the outputs of the comparators are connected to an encoder or possibly to a corresponding number of digital signal outputs. This enables the comparator to simultaneously provide the plurality of output bits of the digital output word. In order to simultaneously provide the required plurality of comparisons, a separate comparator is typically associated with each reference signal to compare the analog input signal to that reference signal. Therefore, in order to produce a digital output having n bits, at least 2nxe2x88x921 comparators are typically required. These comparators are configured to compare the analog input signal to each of 2nxe2x88x921 reference signals and then produce an output corresponding to one of 2n reference intervals defined by the reference levels.
Another known method provides a flash analog-to-digital converter that uses considerably less than 2nxe2x88x921 actual comparators. This is accomplished by employing a plurality of xe2x80x9cpseudo-comparatorsxe2x80x9d between each pair of distantly-spaced actual comparators. These pseudo comparators can generate interstitial outputs that simulate the output of an actual comparator in that position based on weighted averages of the actual comparator outputs. However, the use of such pseudo-comparators would not be appropriate in association with an impedance network that generates a non-linear profile of reference signals. An appropriate network of actual comparators would be necessary in such a case to ensure accuracy.
A known example of such a non-linear profile of reference signals uses a distributed current source across an input impedance network to transform the analog input signal into a parabolic voltage profile, where the position of the voltage peak shifts according to the magnitude of the analog input signal. The distinctive characteristic of this voltage profile is the peak of the parabolic distribution, the position of which is sensed by the comparators. However, this example does not use this parabolic voltage profile in association with a flash converter, but rather with a xe2x80x9cbit slice.xe2x80x9d The bit slice converter that uses n comparators to compare 2n voltage intervals to produce an n-bit digital output. The bit slice converter requires a plurality of parallel-connected xe2x80x9csub-convertersxe2x80x9d, each with its own impedance network on which the input signal needs to be transformed into a parabolic distribution. Thus there is no real savings in circuit components. Furthermore as in the above examples, the comparison range of the comparators is limited. Also, these examples have an added problem of accumulated input currents, resulting in lost gain from high attenuation. Therefore, a need exists for a flash converter that maximizes the available comparison range of the converter while not losing gain from the accumulated input. As will be seen, the invention is directed to these ends.
The invention provides a differential input flash analog-to-digital converter and related method of operations, where an array of comparators is connected to compare reference signals within a parabolic distribution of such signals generated by the application of a differential input signal across an impedance network. The comparator array includes at least two pluralities of comparators, the first plurality of comparators comparing pairs of reference nodes separated by a first step size, and the second plurality of comparators comparing pairs of reference nodes separated by a second step size. The comparator array may further include a third plurality of comparators comparing pairs of reference nodes separated by a third step size. These comparators may be strategically placed to maximize the available comparison range of the converter.
A flash converter embodying to the invention provides increased gain from input without accumulation of comparator input currents and without sacrificing the number of actual comparisons of reference signals. Such a flash converter may include an impedance network in the form of a resistor chain, based on a parabolic distribution of voltages along the resistor chain in conjunction with a plurality of comparators connected to the resistor chain. Alternatively, additional pluralities of comparators may be connected to the resistor chain to further increase the comparison range as well as to decrease attenuation of the circuit.